First of all, a number of old tests with answers have been provided to help you study. When you look at these old tests, be sure to check if the topic that a particular question addresses is included in the list of topics below. Do not panic when you see a question that doesn't make sense or if you think it pertains to an earlier test.
The following is a table of the topics you will be responsible for on Test 3. Only the topics listed below will be on the test.
|Introduction to memory and terminology||Sections 12.1 through 12.3 and 12.5 Note: Make sure you understand the concepts of memory space and chip select design. Be able to compare and contrast DRAM and SRAM as far as their characteristics and applications.|
|Memory hierarchy||Section 13.1|
|Hard drives||Sections 13.2 and 13.3|
|RAM caches||Section 13.4 (Note: Tests before Spring 2005 used the direct mapping algorithm. We will be using the fully associative mapping algorithm.)|
|Introduction to processor architecture||Sections 15.1 through 15.5|
|Pipelined architectures||Sections 15.8|
|Interrupts and DMA||Sections 15.9.3 and 15.9.4|
|Bitwise operations||Section 9.1|
|Checksums||Section 9.4 Note: We were not able to get too deep into this topic. Just be sure you can say in general what a checksum is.|
|Cyclic Redundancy Check||
Section 9.5 Note: We were not able to get too deep into this topic. Just be sure you can answer questions like:
|Hamming Codes||Section 9.6 Note: Only test 3 from Fall 2007 has questions on Hamming codes. Be able to correct errors in Venn diagrams such as those shown in Figure 9-13 of the textbook. Also, last fall's test does not refer to the overall parity bit used to check for double errors. Make sure you know how this works.|
|Serial protocols||Chapter 14|
Created by David Tarnoff for use by his sections of CSCI 2150.