CSCI 4717 -- Test 2 Study Guide

Okay, we've covered alot of material since Test 1, and much of it has been theorhetical in nature, e.g., how might the size of a cache affect the speed of a small application. There have also been a few topics that have been computational in nature such as how to create an error detection and correction scheme for an 8 bit number. Below you will find a list of the topics that will be covered on Test 2. Included for each topic is the assigned reading and other resources we used in class.

As with Test 1, I would look for the test to be about 60% to 70% short answer questions such as "For a specific block size, which cache uses the most bits in a tag?" (BTW, the answer is full associative.) The remaining portion of the test will be questions longer questions such as, "Explain the effects of a small page/frame size on the performance of a virtual memory system."

Topic Reading Class Notes
Buses Lecture slides
Memory Hierarchy
Lecture slides
Pipelining Section 12.4 on Pipelining Lecture slides
Superscalar Machines Lecture slides
Virtual Memory Lecture slides
Physical Memory RAM Technology Worksheet
Error Detection and Correction Section 9.6 of Comp Org Book Error Correction and Detection Worksheet

Below is a mapping of previous year's tests to questions that might look good for our Test 2.

Topic Fall '05 T1
(w/ans)
Fall '06 T1
(w/ans)

Fall '05 T2
(w/ans)

Fall '06 T2
(w/ans)
Fall '05 T3
(w/ans)
Fall '06 T3
(w/ans)
Fall '07 T1

Fall '07 T2

Buses     27-42 22-36     24-29  
Memory Hierarchy 15-32 13-25         14-23  
Pipelining         13-22 13-24   11-18
Superscalar Machines         27-33 30-33   24-33
Virtual Memory         1-7 1-10 37-42  
Physical Memory 33-37 10, 26,
27, 30
        33-34  
Error Detection
and Correction
  31-36 1-10       30-32,
35, 36